`timescale 1ns / 1ps
`default_nettype none

//tests the big_padder

module adder_tb();

  parameter BUS_WIDTH = 8;
  parameter COUNT_EXPONENT = 4; //for 16 iputs
  //do some parameters here to calculate outputwidth and num vals
  parameter OUTPUT_WIDTH = BUS_WIDTH + COUNT_EXPONENT;
  parameter NUM_VALS = 1<<COUNT_EXPONENT;

  logic [BUS_WIDTH-1:0] vals_in[NUM_VALS-1:0];
  logic [OUTPUT_WIDTH-1:0] sum_out;

  big_p_adder #(.BUS_WIDTH(BUS_WIDTH), .COUNT_EXPONENT(COUNT_EXPONENT)) uut
                   (.vals_in(vals_in),
                    .sum_out(sum_out));

  //initial block...this is our test simulation
  initial begin
    $dumpfile("adder.vcd"); //file to store value change dump (vcd)
    $dumpvars(0,adder_tb); //store everything at the current level and below
    $display("Starting Sim"); //print nice message at start
    for (int i=0; i<NUM_VALS; i = i+1)begin
      vals_in[i] = i;
    end
    //#10;
    $display("Sum of all values is %d!",sum_out);
    vals_in[0] = 10;
    #10;
    $display("Adding ten more.");
    $display("Sum of all values is %d!",sum_out);
    $display("Finishing Sim"); //print nice message at end
    $finish;
  end
endmodule
`default_nettype wire